温度报警器外文翻译


    


    毕业设计(文)外文翻译




    题 目 基51单片机温度报警器设计
    英文题目 51 MCUbased design of a temperature alarm
    系 ______ 信息工程系_
    专 业 ______ 电子信息工程_______
    班 级 ______ ___________
    学 号 _______ ________
    姓 名 __ ________ _____________
    指导老师 ________ ____________
    填表日期 ________ ________











    单片机
      单片机指集成块芯片完整计算机系统部分功集成块芯片具完整计算机需部分部件:CPU存部外部总线系统目前部分会具外存时集成诸通讯接口定时器实时时钟等外围设备现强单片机系统甚声音图网络复杂输入输出系统集成块芯片
    单片机称微控制器(Microcontroller)早工业控制领域单片机芯片仅CPU专处理器发展早设计理念通量外围设备CPU集成芯片中计算机系统更更容易集成进复杂提求严格控制设备中INTELZ80早种思想设计出处理器单片机专处理器发展便分道扬镳
    早期单片机8位4位中成功INTEL8031简单性错获评8031发展出MCS51系列单片机系统基系统单片机系统直现广泛着工业控制领域求提高开始出现16位单片机性价理想未广泛应90年代着消费电子产品发展单片机技术巨提高着INTEL i960系列特ARM系列广泛应32位单片机迅速取代16位单片机高端位进入流市场传统8位单片机性飞速提高处理力起80年代提高数百倍目前高端32位单片机频已超300MHz性直追90年代中期专处理器普通型号出厂价格跌落1美元高端型号10美元代单片机系统已裸机环境开发量专嵌入式操作系统广泛应全系列单片机作掌电脑手机核心处理高端单片机甚直接专WindowsLinux操作系统
    8051单片机运算器控制器寄存器等组成运算器完成二进制算术逻辑运算部件ALU核心加暂存器TMP累加器ACC寄存器B程序状态标志寄存器PSW布尔处理器累加器ACC八位寄存器CPU中工作频繁寄存器进行算术逻辑运算时累加器ACC运算前暂存操作数(加数)运算保存结果(代数)寄存器B法法操作标志寄存器PSW八位寄存器存放运算结果特征进位位等位具体含意示PSW CY AC FO RS1 RS0 OV—P户讲关心四点
    1 进位标志CY(PSW7)表示运算否进位(位)果操作结果高位进位(加法)者位(减法)该位1否02
    2 辅助进位标志AC称半进位标志反映两八位数运算低四位否半进位低四位相加(减)否进位(位)AC1状态否0
    3 溢出标志位OVMCS—1反映带符号数运算结果否溢出溢出时位1否0
    4 奇偶标志P反映累加器ACC容奇偶性果ACC中运算结果偶数1(11001100B中41)P0否P1PSW位介绍PSW存放程序执行中状态程序状态字运算器中位(bit)进行逻辑运算逻辑处理机(称布尔处理机)功介绍位指令时说明关控制器控制器CPU神中枢包括定时控制逻辑电路指令寄存器译码器址指针DPTR程序计数器PC堆栈指针SP等里程序计数器PC16位寄存器构成计数器单片机执行程序必须该程序序预先装入存储器ROM某区域单片机动作时应序条条取出指令加执行必须电路找出指令单元址该电路程序计数器PC单片机开始执行程序时PC装入第条指令址取出条指令(字节指令取出指令字节)PC容动加1指条指令址指令序执行程序遇转移指令子程序调指令遇中断时PC转需方8051 CPU指定址ROM相应单元中取出指令字节放指令寄存器中寄存然指令寄存器中指令代码译码器译成种形式控制信号信号单片机时钟振荡器产生时钟脉定时控制电路中相结合形成定时间节拍变化电时钟谓控制信息CPU部协调寄存器间数传输运算等操作
    介绍存储器存储器单片机重组成部分种存储容量256单元存储器结构中存储单元应址256单元256址两位16进制数表示存储器址(00H~FFH)存储器中存储单元存放八位二进制信息通常两位16进制数表示存储器容存储器存储单元址存储单元容两概念混淆单片机包括程序存储器程序控制计算机动作系列命令单片机认识01代码构成机器指令前述助记符编写命令MOV A#20H换成机器认识代码74H20H:(写成二进制01110100B00100000B)单片机处理问题前必须事先编程序表格常数汇编成机器代码存入单片机存储器中该存储器称程序存储器程序存储器放片片外片片外时设置PC程序计数器16位程序存储器16位二进制址外存储器址0000HFFFFH8051部4k字节ROM占0000H~0FFFH低4k字节时片外扩充程序存储器址编号应1000H开始果8051做8031想利片4kROM全片外存储器址编号0000H开始时应EA脚保持低电EA高电时户0000H0FFFH范围部ROM0FFFH单片机CPU动访问外部程序存储器单片机数存储器读写存储器RAM组成容量扩展64k存储实时输入数8051部256单元部数存储器中00H~7FH部机存储器RAM80H~FFH专寄存器区实际时应首先充分利部存储器角度讲搞清部数存储器结构址分配十分重学指令系统程序设计时会常8051部数存储器址00HFFH256字节址空间该空间分两部分中部数RAM址00H~7FH(0~127)做特殊功寄存器址80H~FFH256字节中开辟谓位址区该区域字节寻址位(bit)寻址需进行位操作数存放区域00H1FH安排四组工作寄存器组占8RAM字节记R0~R7究竟选组寄存器前述标志寄存器中RS1RS0选两位放入二进制数选寄存器组
    特殊功寄存器(SFR)址范围80H~FFHMCS-51中程序计数器PC四工作寄存器区外余21特殊功寄存器SFR块中中5双字节寄存器占26字节特殊功寄存器符号址中带*号位寻址特殊功寄存器反映8051状态实际8051状态字控制字寄存器CPU PSW便典型例特殊功寄存器体分两类类芯片引脚关类作片功控制芯片引脚关特殊功寄存器P0~P3实际48位锁存器(IO口)锁存器附加相应输出驱动器输入缓器构成行口MCS-51P0~P3四样行口提供32根IO线根线双第二功余芯片控制寄存器中累加器A标志寄存器PSW数指针DPTR等功前已提
    面谈单片机正常工作单片机正常运作事先需编制程序程序放入存贮器中然CPU执行该程序程序指令组成指令基组成操作码操作数单片机品种设计时样表示操作码操作数规定指令代码相必须选单片机全部指令谓指令系统足够解系列单片机然指令系统性掌握种单片机指令系统系列单片机起触类旁通作MCS-51单片机应广泛派生品种具代表性
    里MCS-51系列指令系统例说明指令组成应例子1MOV A#20H:条指令表示20H数送入累加器A中(特殊功寄存器)例子2ADD A70H:条指令表示累加器A中容(例中送入#20H)存贮器中址70H单元中容(数字)通算术逻辑单元(英文缩写ALU)相加结果保留A中里MOVADD等称操作码A#20H70H等均称操作数汇编语言程序中操作码通常英文单词缩写成样助记忆称助记符MOV英文单词MOVE缩写含搬移意思ADD英文单词意相加略懂英语户掌握单片机指令含意较方便操作数种表示法#20H称立数20H真正操作数70H存贮器中某单元址该单元中放着操作数(说3AH)ADDA70H70HA中容相加存贮器70H单元中3AH取出A中容相加知找实际操作数时转弯甚转弯程称寻址4:操作数放RAM某单元中该单元址放寄存器R0R1中 果RAM址256该址存放16位寄存器DPTR(数指针)中时寄存器名前加@符号表示种间接寻址MOV A@ R0变址寻址相寻址位寻址等详细介绍会问指令中直接出实际操作数简单明?什种寻址方式呢?编制程序时难子出操作数单片机控制温度时时时需定控制温度(20℃)减环境温度环境温度时时变化显然法程序指令中出通定方式送入某输入输出口存放某寄存器中必须寄存器寻址进行算术运算计算班学员科成绩均值果学员科编程序程序中直接出该学员科成绩求均值显然太麻烦里编求均成绩通程序位学员成绩送入存贮器单元中时采取直接寻址程序供学员更方便?寻址方式越编制程序越方便灵活适范围越广寻址找找手机BP机座机电话等种联系方式容易找单片机寻址方式越找操作数越方便单片机功越强前面介绍51系列单片机寻址方式时常遇单片机部寄存器累加器A通寄存器R0~R7数指针DPTR存贮器等介绍指令时数寄存器存贮器间传送者进行运算编制程序需熟悉单片机部结构8051单片机部总体结构基特性:8位CPU片振荡器4k字节ROM128字节RAM21特殊功寄存器32根IO线寻址64k字节外部数程序存贮空间216位定时器计数器中断结构:具二优先级五中断源全双口串行口位寻址(寻找某位容)功适位进行逻辑运算位处理器128字节RAM4k字节ROM中断串行口定时器模块外4组IO口P0~P3余CPU全部组成4kROM换EPROM8751结构掉ROMEPROM部分8031框图果ROM置换Flash存贮器EEPROM省某IO51系列派生品种89C51AT89C2051等单片机框图单片机部分通部总线机连接起
    面谈AT89C51单片机性介绍AT89C51种带4K字节闪烁编程擦读存储器(FPEROM—Flash Programmable and Erasable Read Only Memory)低电压高性CMOS8位微处理器俗称单片机该器件采ATMEL高密度非易失存储器制造技术制造工业标准MCS51指令集输出脚相兼容功8位CPU闪烁存储器组合单芯片中ATMELAT89C51种高效微控制器嵌入式控制系统提供种灵活性高价廉方案
    1特性MCS51兼容4K字节编程闪烁存储器寿命:1000写擦循环数保留时间:10年全静态工作:0Hz24Hz三级程序存储器锁定128*8位部RAM32编程IO线两16位定时器计数器5中断源编程串行通道低功耗闲置掉电模式片振荡器时钟电路
    2脚说明:VCC:供电电压GND:接P0口:P0口8位漏级开路双IO口脚吸收8TTL门电流P1口脚第次写1时定义高阻输入P0够外部程序数存储器定义数址第八位FIASH编程时P0 口作原码输入口FIASH进行校验时P0输出原码时P0外部必须拉高
    P1口:P1口部提供拉电阻8位双IO口P1口缓器接收输出4TTL门电流P1口脚写入1部拉高作输入P1口外部拉低电时输出电流部拉缘FLASH编程校验时P1口作第8位址接收
    P2口:P2口部拉电阻8位双IO口P2口缓器接收输出4TTL门电流P2口写1时脚部拉电阻拉高作输入作输入时P2口脚外部拉低输出电流部拉缘P2口外部程序存储器16位址外部数存储器进行存取时P2口输出址高八位出址1时利部拉优势外部8位址数存储器进行读写时P2口输出特殊功寄存器容P2口FLASH编程校验时接收高8位址信号控制信号
    P3口:P3口脚8带部拉电阻双IO口接收输出4TTL门电流P3口写入1部拉高电作输入作输入外部拉低电P3口输出电流(ILL)拉缘P3口作AT89C51特殊功口:P30 RXD(串行输入口)P31 TXD(串行输出口)P32 INT0(外部中断0)P33 INT1(外部中断1)P34 T0(记时器0外部输入)P35 T1(记时器1外部输入)P36 WR(外部数存储器写选通)P37 RXD(外部数存储器读选通)P3口时闪烁编程编程校验接收控制信号
    RST:复位输入振荡器复位器件时保持RST脚两机器周期高电时间
    ALEPROG:访问外部存储器时址锁存允许输出电锁存址位字节FLASH编程期间引脚输入编程脉时ALE端变频率周期输出正脉信号频率振荡器频率16作外部输出脉定时目然注意:作外部数存储器时跳ALE脉想禁止ALE输出SFR8EH址置0时 ALE执行MOVXMOVC指令ALE起作外该引脚略微拉高果微处理器外部执行状态ALE禁止置位效
    PSEN:外部程序存储器选通信号外部程序存储器取指期间机器周期两次PSEN效访问外部数存储器时两次效PSEN信号出现EAVPP:EA保持低电时期间外部程序存储器(0000H~FFFFH)否部程序存储器注意加密方式EA部锁定RESETEA端保持高电时间部程序存储器FLASH编程期间引脚施加12V编程电源(VPP)
    XTAL1:反振荡放器输入部时钟工作电路输入
    XTAL2:反振荡器输出
    振荡器:XTAL1XTAL2分反放器输入输出该反放器配置片振荡器石晶振荡陶瓷振荡均采采外部时钟源驱动器件XTAL2应接余输入部时钟信号通二分频触发器外部时钟信号脉宽求必须保证脉高低电求宽度
    芯片擦: 整PEROM阵列三锁定位电擦通正确控制信号组合保持ALE脚处低电10ms 完成芯片擦操作中代码阵列全写1非空存储字节重复编程前该操作必须执行外AT89C51设稳态逻辑低零频率条件静态逻辑支持两种软件选掉电模式闲置模式CPU停止工作
    RAM定时器计数器串口中断系统工作掉电模式保存RAM容冻结振荡器禁止芯片功直硬件复位止

    About Singlechip
    Refers to an integrated singlechip at a chip on the integrity of computer systems Even though most of his features at a small chip on but it has a complete computer most of the necessary components CPU memory internal and external bus system most will have the Core At the same time such as integrated communication interfaces timers realtime clock and other peripheral equipment And now the most powerful singlechip microcomputer system can even voice image network complex input and output of system integration on a single chip Also known as singlechip microcontroller because it is the first to be used in the field of industrial control Singlechip by chip dedicated processor CPU only evolved The first design concept through to a large number of peripherals and CPU in a single chip the computer system so that smaller more easily integrated into the complex and demanding with regard to the reference control devices INTEL the Z80 is one of the earliest in accordance with this idea to design the processor From then on the MCU and the development of a dedicated processor parted ways Early singlechip 8bit or all of four One of the most successful are Intel's 8031 because the performance of a good reliable and easy access to great acclaim Later on in 8031 developed a series of singlechip microcomputer system MCS51 Based on singlechip microcomputer system of the system is still widely used until now As the field of industrial control requirements improve beginning a 16bit singlechip but not ideal because costeffective has not been very widely used After the 90's with the big consumer electronics product development singlechip technology has been enormous improve With INTEL i960 series especially the later series of widely used ARM 32bit singlechip 16bit singlechip microcomputer rapidly replacing highend status and enter the mainstream market Whereas the traditional 8bit MCU performance has been the rapid increase in processing power compared to the 80's to raise a few hundred times At present the highend singlechip 32 GHz has been more than 300MHz the performance of close on the heels of the mid90's dedicated processor while the general model exfactory price dropped to one US dollars the most highend models only 10 US dollars Contemporary singlechip microcomputer system is no longer only in the baremetal environment development and use of a large number of dedicated embedded operating system is widely used in on a full range of singlechip microcomputer In the cell phone as a handheld computer and deal with highend singlechip core can even direct the use of a dedicated Windows and Linux operating systems
    Singlechip 8051 CPU by the operator and controller Calculator to complete the binary arithmeticlogic operations Parts ALU at the core together with registers on TMP accumulator ACC register B the procedure register PSW status symbol and Boolean processor Accumulator ACC is an eight registers which are the most frequent job of CPU registers In arithmetic logic operations the accumulator ACC is often a temporary one at precomputing operands (such as being summand) and computing and then save the results (such as algebra and) Register B mainly used for multiplication and division operations PSW register is also a mark of eight registers used to store the results of some of the characteristics of computing if not binary and so on and borrow Its specific meaning of each are shown below PSW CY AC FO RS1 RS0 OVP to users the most concerned about are the following four
    First of all the binary symbol CY (PSW7) Whether or not it has express a binary operator (or borrow bits) If the operation results at the highest level there is binary (addition) or borrow (subtraction) the bit is 1 otherwise to 0 Secondly auxiliary binary symbol AC Also known as semibinary logo it reflects both the number eight computing whether there is a half low of four binary that is the sum of the four low (or minus) has not binary (or borrow) and if there is AC for one status otherwise to 0 Third the overflow flag OV MCS1 to reflect the number of operator symbols with the results of whether there is any spill there is spill this bit is 1 otherwise to 0 Fourth the parity symbol P Reflect the content of accumulator ACC parity if the ACC in an operation that results in evennumbered months have one (such as 11001100B one of four there is one) then P is 0 otherwise P 1 PSW other places will introduce at a later time PSW stored procedures because of the status it is also called the program status character have a calculator in bitwise (bit) to carry out logic operations logic processor (also known as Boolean processor) Its function in the introduction explainbit instruction About the controller CPU controller is the nerve center which includes the timing control logic circuit an instruction register decoder address pointer DPTR and the program counter PC stack pointer SP and so on This program counter PC is 16bit register consisting of counters To singlechip implementation of a program it is necessary to put the program into memory in advance in order ROM of an area Single chip action should be taken out of a sequence of commands to be implemented Therefore we must have a circuit to find out where the command module address the circuit is the program counter PC
    When beginning the implementation of singlechip program to the PC load instructions where the first address it took out one of each command (such as for multibyte instructions each took out a command byte) PC will automatically add the contents of one to point to the next instruction address so that instruction can be the order of implementation Only when the process encountered in the transfer of instructions subroutine call instructions or encountered failure (after the introduction) PC only needed to go to go places 8051 CPU's designated address the corresponding unit from the ROM command byte out on the instruction register in the storage then an instruction register of the instruction decoder code was translated into various forms of control signals these singlechip signal and clock oscillator generated clock pulse in timing and control circuit combination of a certain period of time according to changes in electric calm beat the clock the socalled control of information in the CPU internal coordination between the register data transfer computing and other operations
    Then tell us about memory memory MCU are also an important component of has a storage capacity of 256 units of memory structure One of each memory cell corresponds to an address a total of 256 unit 256 addresses use two 16 hexadecimal numbers that is memory address (00H ~ FFH) Memory of each memory cell can store one of eight binary information usually using two 16band number to express and this is the contents of memory Memory storage unit address and the contents of memory cells are two different concepts should not confuse Singlechip also includes the program memory Process control computers are a series of action commands Microcontroller Know only by 0 and 1 consisting of machine code instructions Such as the preparation of the foregoing order with Mnemonic MOV A # 20H Know the code into the machine 74H 20H (written in binary is 01110100B and 00100000B) Problem in SCM is required before the deal will be good procedures tables constants compiled into machine code into singlechip memory the memory referred to as program memory Program memory can be put on the chip or chip chipchip can also be set up simultaneously As the PC program counter to 16 making the procedure available for 16bit binary memory addresses therefore both inside and outside the memory address from 0000H to the largest FFFFH 8051 has 4k bytes of internal ROM on the occupied by the 0000H ~ 0FFFH minimum 4k bytes when the expansion of chip program memory address number shall be 1000h start if you use 8051 as a 8031 do not want to use chip 4kROM all used memory chip then the address code can still start from 0000HHowever when EA feet should be used to maintain the low level When EA is high the user 0FFFH at 0000H to use internal ROM more than 0FFFH the singlechip CPU automatic access to external program memory Singlechip data memory RAM memory by reading and writing components Its maximum capacity can be expanded to 64k used to store realtime input data 8051 has 256 units within the internal data memory one of 00H ~ 7FH for internal random access memory RAM 80H ~ FFH area dedicated registers Actual use should be the first full use of internal memory from the use of perspective to understand the structure of internal data memory and address of the distribution is very important Since studying at the future directions of design systems and procedures will be frequently used them 8051 internal data memory address 00H to FFH by a total of 256 bytes of address space the space was divided into two parts one of the internal data RAM address 00H ~ 7FH (that is 0 ~ 127) The Special Function Registers to do with the address 80H ~ FFH In this 256byte also has opened up a socalled digital address area the region can not only byte addressable but also by the bit (bit) addressable For those required to carry out the operation of the data bit can be stored into the region From 00H to 1Fh arranged group of four working registers each occupied by 8byte RAM recorded as R0 ~ R7 Whether the choice of which set of registers from the aforementioned signs register in the selection of RS1 and RS0 Add on at these two different binary number you can choose different registers
    Special Function Register (SFR) address the range of 80H ~ FFH At MCS51 in addition to program counter register PC and four job outside the region and the remaining 21 special function registers in this block in SFR Are one of five doublebyte register and they take up a total of 26 bytes Special Function Registers of the symbols and addresses see Schedule 2 With * one of the availablebit addressing Special Function Registers status reflects the 8051 8051 are in fact the status word and control word register CPU PSW is typical for a case These Special Function Registers generally classified into two categories one category with the pin on the chip and the other for chip control function Pin and chiprelated special function registers are P0 ~ P3 they are in fact four of eight latches (one for each I O port A) each has additional latch corresponding output driver and input buffers constitutes a parallel port MCS51 a total of P0 ~ P3 four such parallel port provides 32 I O lines each line are twoway and large have the second function The rest used for chip control registers the accumulator A signs register PSW data pointers DPTR function mentioned before
    Here again how to talk about how to make singlechip work correctly Singlechip to normal operation to be programmed in advance and then the procedure Add memory and then by the CPU to implement the program Procedures are composed by the instructions directives are the basic components and operation of several op code A lot of singlechip varieties how to express the design of opcode and operand have their own requirements and then there is instruction code varies therefore must be singlechip all the selected command which is the socalled instruction there is enough understanding Although the various series of singlechip systems have different commands but also has its commonality Master a singlechip instruction systems to other series Single chip comprehend by analogy can play a role MCS51 singlechip applications derived many varieties representative therefore here to MCS51 series of instruction as an example command the composition and application Examples 1 MOV A # 20H The instructions said put the number of 20H into the accumulator A in (a special function register) Example 2 ADD A 70H This command put express accumulator A content (in the above example into the # 20H) and memory in the address of the content unit 70H (a figure) through the arithmetic logical unit (English abbreviation for the ALU) added together the results remain in the A Medium Here MOV ADD etc known as the opcode while the A # 20H 70H all known as the operand In assembly language programs operation code is usually made by the English word acronym to help remember therefore also known as Mnemonic English words such as MOV is the abbreviation of MOVE which contains the meaning of the removal and ADD is the English word which means the sum Therefore users have some knowledge of English to grasp the meaning of singlechip instruction are more convenient
    Operand has a wide range of express law such as more than a few # 20H is called immediately namely 20H operand is true And 70H is the memory address of a unit in the unit placed operand (for example are 3AH) ADD A 70H instead of 70H and add the contents of A but from memory 70H unit 3AH will remove the content and the sum of A By up we can see that the actual operation to find a few and sometimes have to turn a corner and even turn some bends this process is known as addressable MCS51 a total of seven kinds of addressing are presented below
    First immediately addressing operand writing in the directive on and on the procedures with opcode in memory Put # is placed immediately in front of a few to express the way for addressing the immediate addressing such as # 20H
    Second register addressing operand on the register in the directive to register the name directly to express operand address For example MOV A R0 to belong to register addressing the contents of register R0 is about to accumulator A Medium
    Third directly addressing operand MCU internal RAM on a unit in the instruction directly write the address of the module Precedent such as the ADD A 70H in 70H
    Four register indirect addressing operand RAM on a particular unit the unit's address also on the register R0 or R1 Medium If the address of RAM is greater than 256 the address stored in 16bit register DPTR (data pointer) the time at the former register add @ symbol to indicate such an indirect addressing Such as MOV A @ R0
    Other sides have variable addressing relative addressing bitaddressable and so on to be detailed later
    Some people might ask in the instruction directly give the number of actual operation is not easy to understand Why should we use several other addressable way
    This is because it is very difficult in the preparation of procedures immediately give operand Such as using singlechip control of temperature from time to time required to control a given temperature (such as 20 #) minus the ambient temperature and ambient temperature has changed from time to time apparently unable to give orders in the proceedings only through the way must be into an input output port and then stored in a register which must be used for addressable register Another example is to carry out arithmetic operations various participants in each class to calculate the average score if each student put the sections are made of a procedure in the proceedings directly give the students grade subjects and then for the average it is clear too much trouble Here can be made for an average grade of a common procedure put each participant's score into the various memory units may be taken at this time directly addressing a program for each student to use not easier Therefore addressing the more programming more convenient and flexible the scope of application of the more broad addressing like to find people such as people have been looking for cell phone BP machine landline phone etc Contacts are easy to find on He singlechip microcomputer is also the case addressing the more operands to find more convenient singlechip functions of the stronger In front of 51 family MCU introduce addressable manner often encounter a number of internal singlechip registers accumulator
    A generalpurpose registers R0 ~ R7 data pointer DPTR and the memory and so on Introduction at a later instruction the data is necessary in these registers memory between the transmission or conduct operations Therefore the establishment of procedures would need to be familiar with the internal structure of SCM 8051 within the overall structure of its basic characteristics 8bit CPU chip oscillator 4k byte ROM 128 bytes RAM 21 special function registers 32 I O lines addressable 64k bytes external data the program storage space two 16bit timers counters interrupt structure with Priority 2 the five interrupt sources A full dualport serial portBit addressing (you can search the contents of a) function suitable for logic operations carried out by the bit processor In addition to 128byte RAM 4k byte ROM and interruption serial port and timer modules there are 4 group I O port P0 ~ P3 the remaining component is the CPU all Put 4kROM for 8751 for the EPROM is the structure such as removal of ROM EPROM part of the diagram is 8031 if the ROM replacement for Flash memory or EEPROM or resave some I O you get 51 series derived species such as 89C51 AT89C2051 MCU block diagram etc Single chip are all parts of the bus through an internal organically linking
    AT89C51 singlechip performance talk about the following introduction AT89C51 is a flicker with 4K byte erasable programmable readonly memory (FPEROMFalsh Programmable and Erasable Read Only Memory) of lowvoltage highperformance CMOS8 bit microprocessor commonly known as singlechip microcomputer The device ATMEL manufacture highdensity nonvolatile memory technology with industrystandard MCS51 Instruction set and output pin compatible Because of the multipurpose 8bit CPU and flash memory chips in a single portfolio ATMEL The AT89C51 is a highperformance microcontrollers for a lot of embedded control system provides a flexible and inexpensive program Main features with the MCS51 compatible 4K bytes Programmable Flash Memory Life expectancy 1000 Writing wipe cycle data retention time 10 years wholly static job 0Hz24Hz Threetier program memory lock 128 * 8bit internal RAM 32 programmable I O line Two 16bit timer counter interrupt sources 5 Programmable serial channel Lowpower idle and powerdown modechip oscillator and clock circuitry Pin Description VCC power supply voltage GND Ground P0 port P0 mouth for a grade 8 opendrain bidirectional I O port each pin can absorb current 8TTL door P1 pin when I first Writing 1 is defined as the high impedance input P0 can be used for external program data memory which can be defined as data address bit eight At FIASH programming P0 port input as the original code when FIASH to check when P0 output of the original code this time outside P0 must be pushed P1 port P1 port are provided on an internal pullup resistor of 8 bidirectional I O port P1 mouth to receive the output buffer current 4TTL door P1 pin I write one she was an internal pullhigh can be used as input P1 I was an external pulldown low when the output current which is up because of internal reasons la FLASH programming and calibration at the time P1 mouth as eightbit address to receive P2 port P2 mouth to an internal pullup resistor on the 8bit bidirectional I O port P2 I can receive buffers the output current of 4 TTL door when I was P2 Writing 1 the pin was on the internal push pullup resistor and as an input And therefore as a type P2 pin I was driving down the outside to output current This is up because of internal reasons la P2 mouth when used in external program memory or 16bit address of the external data memory access time P2 port output address high eight Give the address at 1 it is the use of internal pulladvantage when eight addresses on the external data memory read and write when P2 I output the contents of special function registers P2 mouth at FLASH programming and calibration receive high eight address signals and control signals P3 mouth P3 mouth are 8pin with internal pullup resistor on the bidirectional I O port to receive the output current of 4 TTL door P3 When I write 1 they were for internal pullhigh and used as input As input because of the external pulldown low P3 will output current I (ILL) This is the reason because of pull up P3 mouth can also be used as a number of special features AT89C51 mouth as shown below P30 RXD (serial input port) P31 TXD (serial output port) P32 INT0 (external interrupt 0) P33 INT1 (external interrupt 1) P34 T0 (timer 0 external input) P35 T1 (timer 1 external input) P36 WR (external data memory write strobe) P37 RD (external data memory read strobe) P3 mouth at the same time flashing check programming and programming control signals to receive RST Reset input When the oscillator device reset the RST pin to maintain both the high machine cycle time ALE PROG When access to external memory the address latch to allow the output level for the latch status of the address byte At FLASH programming period this pin for input programming pulse In peacetime ALE client to change the frequency of cycle positive pulse output signal the frequency of the oscillator frequency of 1 6 Therefore it can be used for external pulse output or for the purpose from time to time However it should be noted that Whenever used for external data memory it will skip one ALE pulse Want to prohibit such as ALE output can be at home on SFR8EH address 0 At this point ALE is only in the implementation of MOVX MOVC instructions are only the role of ALE In addition the pin has been slightly pushed up If the microprocessor at the implementation status of external ALE prohibited home digital invalid PSEN external program memory of the Strobe At by an external program memory access refers to the period twice each machine cycle PSEN effective However access to external data memory at the time these two effective PSEN signal will not occur EA VPP When EA to maintain lowlevel then during this period the external program memory (0000HFFFFH) regardless of whether there is an internal program memory Note
    Encryption method EA will be locked for internal RESET When EA to maintain highend the internal program memory here At FLASH programming period this pin is also used to exert power 12V programming (VPP) XTAL1 reverse oscillation amplifier job input and internal clock circuit input XTAL2 Output from the oscillator reverse
    Oscillator XTAL1 and XTAL2 are the reverse of the input and output amplifier The amplifier can be configured to reversechip oscillator Crystals and ceramic oscillation can be used Such as the use of an external clock source drive device XTAL2 should be no access More than input to the internal clock signal through a two subfrequency flipflop so the external clock signal pulse width without any request but must ensure that the highlow pulse width requirements
    Chip Erase The entire array and three PEROM lock bit erase electricity through the correct combination of control signals and to maintain the ALE pin at the low 10ms to complete At chip wipe operation code arrays were all Writing 1 and in any nonempty memory byte has been programmed to repeat the past the operation must be executed In addition AT89C51 has a steadystate logic can be at low to zero frequency under the conditions of static logic supports two software selectable powerdown mode At idle mode CPU stop working
    However RAM timers counters serial port and interrupt system are still working At Powerdown mode to preserve the contents of RAM and freezing oscillator the prohibition of the use of other chip functions until the next hardware reset date

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